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//
// SCSI2_Class - provides architecture independendent low-level
// SCSI device access.
//
// Copyright (C) 1994 by Christopher Wolf.
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Library General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Library General Public License for more details.
//
// You should have received a copy of the GNU Library General Public
// License along with this library; if not, write to the Free
// Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
//
// Bug-reports, comments and questions should be directed to:
// Christopher Wolf <chris@alchemy.geo.cornell.edu>
//
// Portions of this code are derived from an earlier work
// (SCSI Inquirer) Copyright (C) 1990, 1991, 1992 by Jiro Nakamura
// and used with permission.
//
//
// For best results view this file with a tab size of 4 and
// a display width of 132 columns or wider.
//
// file version infomation
#define RCSSRH "$Id: scsi2reg.h,v 0.78 94/11/27 17:01:29 chris Exp $"
#ifndef _BSD_DEV_SCSIREG_
#define _BSD_DEV_SCSIREG_
#import <sys/ioctl.h>
#import <sys/time.h>
#import <kernserv/queue.h>
#import <sys/types.h>
// ****************
// Define Constants
// ****************
// cdb control byte values
#define CTRL_NOLINK 0x00 // no command linking
#define CTRL_LINK 0x01 // link only
#define CTRL_LINKFLAG 0x03 // link and flag bits
// six byte cdb opcodes
#define C6OP_TESTRDY 0x00 // test unit ready
#define C6OP_REWIND 0x01 // rewind
#define C6OP_REZEROUNIT 0x01 // rezero unit
#define C6OP_REQSENSE 0x03 // request sense
#define C6OP_FORMAT 0x04 // format unit
#define C6OP_READBLOCKLIMITS 0x05 // Read block limits (tape)
#define C6OP_REASSIGNBLK 0x07 // OPT: reassign block
#define C6OP_READ 0x08 // read data
#define C6OP_WRITE 0x0a // write data
#define C6OP_SEEK 0x0b // seek
#define C6OP_READREV 0x0F // read reverse
#define C6OP_WRTFM 0x10 // write filemarks
#define C6OP_SPACE 0x11 // space records/filemarks
#define C6OP_INQUIRY 0x12 // get device specific info
#define C6OP_VERIFY 0x13 // sequential verify
#define C6OP_MODESELECT 0x15 // OPT: set device parameters
#define C6OP_MODESENSE 0x1a // OPT: get device parameters
#define C6OP_STARTSTOP 0x1b // OPT: start or stop device
#define C6OP_RECEIVEDIAG 0x1C // Receive diagnostic
#define C6OP_SENDDIAG 0x1d // send diagnostic
#define C6OP_MEDIUMREMOVAL 0x1e // Prevent/Allow Medium Removal
// ten byte cdb opcodes
#define C10OP_READCAPACITY 0x25 // read capacity
#define C10OP_READEXTENDED 0x28 // read extended
#define C10OP_WRITEEXTENDED 0x2a // write extended
#define C10OP_SEEKEXTENDED 0x2B // seek extended
#define C10OP_SETLIMITS 0x33 // set limits
#define C10OP_SYNCHRONIZECACHE 0x35 // Synchronize Cache
#define C10OP_READDEFECTDATA 0x37 // Read Defect Data
#define C10OP_READLONG 0x3e // Read Long
#define C10OP_READSUBCHANNEL 0x42 // CD-ROM Read SubChannel
#define C10OP_READTOC 0x43 // CD-ROM Read TOC
#define C10OP_PLAYAUDIOMSF 0x47 // CD-ROM Play Audio MSF
#define C10OP_MODESENSEEXTENDED 0x5A // Mode Sense(10)
// extended sense command status byte codes
#define STAT_GOOD 0x00 // cmd successfully completed
#define STAT_CHECK 0x02 // abnormal condition occurred
#define STAT_CONDMET 0x04 // condition met / good
#define STAT_BUSY 0x08 // target busy
#define STAT_INTMGOOD 0x10 // intermediate / good
#define STAT_INTMCONDMET 0x14 // intermediate / cond met / good
#define STAT_RESERVED 0x18 // reservation conflict
#define STAT_MASK 0x1e // clears vendor unique bits
#define STAT_VALIDMASK 0x3e // Valid bits of Status Byte
#define STAT_TERMINATED 0x22 // command terminated
#define STAT_QUEUEFULL 0x28 // queue full
// extended sense command sense key codes
#define SENSE_NOSENSE 0x0 // no error to report
#define SENSE_RECOVERED 0x1 // recovered error
#define SENSE_NOTREADY 0x2 // target not ready
#define SENSE_MEDIA 0x3 // media flaw
#define SENSE_HARDWARE 0x4 // hardware failure
#define SENSE_ILLEGALREQUEST 0x5 // illegal request
#define SENSE_UNITATTENTION 0x6 // drive attention
#define SENSE_DATAPROTECT 0x7 // drive access protected
#define SENSE_ABORTEDCOMMAND 0xb // target aborted command
#define SENSE_VOLUMEOVERFLOW 0xd // eom, some data not transfered
#define SENSE_MISCOMPARE 0xe // source/media data mismatch
// extended sense command device qualifiers
#define DEVQUAL_OK 0x00 // device is connected to this lun
#define DEVQUAL_MIA 0x01 // device not connected to lun
#define DEVQUAL_RSVD 0x02 // reserved
#define DEVQUAL_NODEV 0x03 // target doesn't support dev on lun
#define DEVQUAL_VUMASK 0x04 // 1XXb is vendor specific
// inquiry command device types
#define DEVTYPE_DISK 0x00 // read/write disks
#define DEVTYPE_TAPE 0x01 // tapes and other sequential devices
#define DEVTYPE_PRINTER 0x02 // printers
#define DEVTYPE_PROCESSOR 0x03 // cpu's
#define DEVTYPE_WORM 0x04 // write-once optical disks
#define DEVTYPE_CDROM 0x05 // cd rom's, etc
#define DEVTYPE_SCANNER 0x06 // scanner
#define DEVTYPE_OPTICAL 0x07 // other optical storage
#define DEVTYPE_CHANGER 0x08 // jukebox
#define DEVTYPE_COMM 0x09 // communication device
#define DEVTYPE_GRAPH_A 0x0a // ASC IT8 graphics
#define DEVTYPE_GRAPH_B 0x0b // ASC IT8 graphics
#define DEVTYPE_NOTPRESENT 0x1f // logical unit not present
// miscellaneous constants
#define MAXPAGES 8 // maximum number of mode select pages
#define MAXBLOCKDESCRIPTORS 8 // maximum number of block descriptors
#define MODESENSEBUFLENGTH 200 // size for mode sense buffer length
#define KILOBYTE 1024 // kilobyte
#define MEGABYTE 1048576 // a "real" binary megabyte
#define CDB_6_MAX_LENGTH 255 // max block count for 6 byte commands
#define CDB_6_MAX_LBA ((1<<21)-1) // max block address for 6 byte commands
#define SCSI_NTARGETS 8 // 0 - 7 for target numbers
#define SCSI_NLUNS 8 // 0 - 7 luns for each target
// mode select/sense page codes
#define RWERRORRECOVERYPAGE 0x01 // read write error recovery page
#define DISCONNECTPAGE 0x02 // disconnect/reconnect page
#define FORMATDEVICEPAGE 0x03 // format device page
#define RIGIDDISKPAGE 0x04 // rigid disk page
#define FLEXIBLEDISKPAGE 0x05 // flexible disk page
#define VERRORRECOVERYPAGE 0x07 // verify error recovery page
#define CACHINGPAGE 0x08 // caching page
#define PERIPHERALPAGE 0x09 // peripheral page
#define CONTROLMODEPAGE 0x0A // control mode page
#define MEDIUMTYPESPAGE 0x0B // medium types page
#define NOTCHPAGE 0x0C // notch page
#define CDROMPARAMETERSPAGE 0x0D // cdrom parameters page
#define CDROMAUDIOCONTROLPAGE 0x0E // cdrom audio control page
#define DEVICECONFIGPAGE 0x10 // device configuration page
// scsi_req status codes
typedef enum
{
SR_IOST_GOOD = 0, // successful
SR_IOST_SELTO = 1, // selection timeout
SR_IOST_CHKSV = 2, // check status, sr_esense valid
SR_IOST_CHKSNV = 3, // check status, sr_esense not valid
SR_IOST_DMAOR = 4, // target attempted to move more than sr_dma_max bytes
SR_IOST_IOTO = 5, // sr_ioto exceeded
SR_IOST_BV = 6, // SCSI Bus violation
SR_IOST_CMDREJ = 7, // command reject (by driver)
SR_IOST_MEMALL = 8, // memory allocation failure
SR_IOST_MEMF = 9, // memory fault
SR_IOST_PERM = 10, // not super user
SR_IOST_NOPEN = 11, // device not open
SR_IOST_TABT = 12, // target aborted command
ST_IOST_BADST = 13, // bad SCSI status byte
ST_IOST_INT = 14, // internal driver error
SR_IOST_BCOUNT = 15, // unexpected byte count seen on SCSI bus
SR_IOST_VOLNA = 16, // desired volume not available
SR_IOST_WP = 17, // Media Write Protected
SR_IOST_ALIGN = 18, // DMA alignment error
SR_IOST_IPCFAIL = 19, // Mach IPC failure
SR_IOST_RESET = 20, // bus was reset during processing of command
SR_IOST_PARITY = 21, // SCSI Bus Parity Error
SR_IOST_HW = 22, // Gross Hardware Failure
SR_IOST_DMA = 23, // DMA error
SR_IOST_INVALID = 100, // should never be seen
} sc_status;
#define SR_IOST_BADST ST_IOST_BADST
#define SR_IOST_INT ST_IOST_INT
// dma direction specifier for scsi_req
typedef enum
{
SR_DMA_RD = 0, // DMA from device to host
SR_DMA_WR = 1, // DMA from host to device
} sc_dma_dir;
// generic SCSI ioctl requests
#define SGIOCREQ _IOWR('s', 1, struct scsi_req) // cmd request using struct scsi_req (use with openDevice:)
#define SGIOCSTL _IOW('s', 0, struct scsi_adr) // set target/lun
#define SGIOCENAS _IO( 's', 2) // enable autosense
#define SGIOCDAS _IO( 's', 3) // disable autosense
#define SGIOCRST _IO( 's', 4) // reset SCSI bus
#define SGIOCCNTR _IOW( 's', 6, int) // select controller
// ioctl requests specific to SCSI disks
#define SDIOCSRQ _IOWR('s', 1, struct scsi_req) // cmd request using struct scsi_req (use with openDevice:)
#define SDIOCGETCAP _IOR('s', 5, struct capacity_reply) // get read capacity info
// ioctl requests specific to SCSI tapes
#define MTIOCSRQ _IOWR('m', 11, struct scsi_req) // cmd request using struct scsi_req (use with openDevice:)
#define MTIOCFIXBLK _IOW('m', 5, int ) // set fixed block mode
#define MTIOCVARBLK _IO('m', 6) // set variable block mode
#define MTIOCMODSEL _IOW('m', 7, struct modesel_parms) // mode select
#define MTIOCMODSEN _IOWR('m',8, struct modesel_parms) // mode sense
#define MTIOCINILL _IO('m', 9) // inhibit illegal length errors
#define MTIOCALILL _IO('m', 10) // allow illegal length errors
// *****************
// Define Structures
// *****************
//
// Note:
//
// Any references to "Sections" or "Tables" within this header
// file refer to the pertinent area of the SCSI-2 specification.
//
// Numbers in the first column of the comment field indicate
// BYTE offsets within the structure.
//
// Many of the structures defined in this header file include multi-
// byte elements which must be stored in big-endian byte ordering
// format. These elements, whose names have been changed to end
// with _BExx, require special handling to ensure that programs
// accessing them will work on both Intel (__LITTLE_ENDIAN__)
// and Morotola (__BIG_ENDIAN__) architectures.
//
// To manipulate values in fields postfixed with _BExx use one of
// the readBigEndian or writeBigEndian functions defined in the
// SCSI2 class. Provide these functions with the starting address
// of the element and the number of bits in the element. In some
// cases where a _BExx element is oddly aligned the element is
// declared as an array of characters - be careful to specify
// the correct element bit length! (ie: someElement_BE24[3] is 24
// bits long and would be read using this function call:
// val = readBigEndianValue(&struct.someElement_BE24, 24);
//
//
// Command reply structure definitions
//
struct capacity_reply // Reply structure for read capacity command
{
u_int cr_lastlba_BE32; // 00-03 last logical block address (number of blocks - 1)
u_int cr_blklen_BE32; // 04-07 block length (in bytes)
};
struct inquiry_reply // Reply structure for inquiry command
{
#ifdef __BIG_ENDIAN__
u_char ir_peripheralqualifier:3, // 00 peripheral qualifier flags
ir_devicetype:5; // device type, see below
u_char ir_removable:1, // 01 removable media bit
ir_typequalifier:7; // device type qualifier
u_char ir_isoversion:2, // 02 ISO version number
ir_ecmaversion:3, // ECMA version number
ir_ansiversion:3; // ANSI version number
u_char ir_aenc: 1, // 03 Asynchronous event notification
ir_trmiop: 1, // terminate I/O process
ir_zero4:2, // reserved
ir_rspdatafmt:4; // response data format
u_char ir_addlistlen; // 04 additional list length
u_char ir_reserved5; // 05 reserved
u_char ir_reserved6; // 06 reserved
u_char ir_reladr: 1, // 07 relative addressing mode supported
ir_wbus32: 1, // 32 bit wide bus supported
ir_wbus16:1, // 16 bit wide bus supported
ir_sync:1, // synchronous transfer supported
ir_linked:1, // linked commands supported
ir_zero5:1, // reserved
ir_cmdque:1, // command queuing supported
ir_sftre:1; // soft reset supported
#else
u_char ir_devicetype:5, // 00 device type, see below
ir_peripheralqualifier:3; // peripheral qualifier flags
u_char ir_typequalifier:7, // 01 device type qualifier
ir_removable:1; // removable media flag
u_char ir_ansiversion:3, // 02 ANSI version number
ir_ecmaversion:3, // ECMA version number
ir_isoversion:2; // ISO version number
u_char ir_rspdatafmt:4, // 03 response data format
ir_zero4:2, // reserved
ir_trmiop:1, // terminate I/O process
ir_aenc:1; // Asynchronous event notification
u_char ir_addlistlen; // 04 additional list length
u_char ir_reserved5; // 05 reserved
u_char ir_reserved6; // 06 reserved
u_char ir_sftre:1, // 07 soft reset supported
ir_cmdque:1, // command queuing supported
ir_zero5:1, // reserved
ir_linked:1, // linked commands supported
ir_sync:1, // synchronous transfer supported
ir_wbus16:1, // 16 bit wide bus supported
ir_wbus32:1, // 32 bit wide bus supported
ir_reladr:1; // relative addressing mode supported
#endif
char ir_vendorid[8]; // 08 - 15 vendor name in ascii
char ir_productid[16]; // 16 - 31 product name in ascii
char ir_revision[4]; // 32 - 35 revision level info in ascii
char ir_vendorspecific[20]; // 36 - 55 vendor specific information
char ir_zero6[40]; // 56 - 95 reserved
char ir_endofid[1]; // 96 just a handle for end of id info
};
typedef struct esense_reply // Table 7-35 reply structure for extended sense command
{
#ifdef __BIG_ENDIAN__
u_char esr_valid:1, // 00 0 = non-standard, 1 = standard format
esr_errorclass:3, // error class
esr_errorcode:4; // error code
u_char esr_segmentnumber; // 01 number of current segment descriptor
u_char esr_filemark:1, // 02 filemark read or set
esr_eom:1, // end of medium
esr_ili:1, // incorrect length indicator
esr_reserved2:1, // reserved
esr_sensekey:4; // sense keys (tables 7-39 and 7-40)
#else
u_char esr_errorcode:4, // 00 error code
esr_errorclass:3, // error class
esr_valid:1; // 0 = non-standard, 1 = standard format
u_char esr_segmentnumber; // 01 number of current segment descriptor
u_char esr_sensekey:4, // 02 sense keys (tables 7-39 and 7-40)
esr_reserved_2:1, // reserved
esr_ili:1, // incorrect length indicator
esr_eom:1, // end of medium
esr_filemark:1; // filemark read or set
#endif
u_char esr_information_BE32[4]; // 03-06 information (device type and command specific)
u_char esr_aslength; // 07 additional sense bytes
u_char esr_csi_BE32[4]; // 08-11 command specific information
u_char esr_ascode; // 12 additional sense code
u_char esr_asqual; // 13 additional sense code qualifier
u_char esr_reserved14; // 14
u_char esr_reserved15; // 15
u_char esr_errcount[3]; // 16-18
u_char esr_stat[3]; // 19-21
u_char esr_reserved22; // 22
u_char esr_remaining[3]; // 23-25
} esense_reply;
//
// SCSI command data structures
//
struct cdb6 // generic 6 byte command descriptor block
{
u_char c6_opcode; // 00 device command
u_char c6_lunlba_BE24[3]; // 01-03 upper 3 bits lun, lower 21 bits lba (wierd but necessary!)
// access it like this:
// writeBigEndianValue((lun<<21)+lba, &cdb->c6_lunlba_BE24, 24)
u_char c6_len; // 04 transfer length
u_char c6_ctrl; // 05 control byte
};
struct cdb10 // generic 10 byte command descriptor block
{
u_char c10_opcode; // 00 device command
#ifdef __BIG_ENDIAN__
u_char c10_lun:3, // 01 logical unit
c10_dpo:1, // disable page out
c10_fua:1, // force unit access
c10_reserved1:2, // reserved: must be zero
c10_reladr:1; // address relative to previous
#else
u_char c10_reladr:1, // 01 address relative to previous
c10_reserved1:2, // reserved: must be zero
c10_fua:1, // force unit access
c10_dpo:1, // disable page out
c10_lun:3; // logical unit
#endif
u_char c10_lba_BE32[4]; // 02-05 logical block address
u_char c10_reserved6; // 06 reserved: must be zero
u_char c10_len_BE16[2]; // 07-08 transfer length
u_char c10_ctrl; // 09 control byte
};
struct cdb12 // generic 12 byte command descriptor block
{
u_char c12_opcode; // 00 device command
#ifdef __BIG_ENDIAN__
u_char c12_lun:3, // 01 logical unit
c12_dpo:1, // disable page out
c12_fua:1, // force unit access
c12_reserved1:2, // reserved: must be zero
c12_reladr:1; // address relative to previous
#else
u_char c12_reladr:1, // 01 address relative to previous
c12_reserved1:2, // reserved: must be zero
c12_fua:1, // force unit access
c12_dpo:1, // disable page out
c12_lun:3; // logical unit
#endif
u_char c12_lba_BE32[4]; // 02-05 logical block address
u_char c12_reserved6; // 06 reserved: must be zero
u_char c12_reserved7; // 07 reserved: must be zero
u_char c12_reserved8; // 08 reserved: must be zero
u_char c12_len_BE16[2]; // 09-10 transfer length
u_char c12_ctrl; // 11 control byte
};
struct cdb6_mode_sense // Table 7-24 cdb for mode sense command
{
u_char ms_opcode; // 00 mode sense opcode
#ifdef __BIG_ENDIAN__
u_char ms_lun:3, // 01 logical unit number
ms_reserved1a:1, // reserved
ms_dbd:1, // disable block descriptors
ms_reserved1b:3; // reserved
u_char ms_pagecontrol:2, // 02 page control field (see Table 7-25)
ms_pagecode:6; // page code (see Table 7-26)
#else
u_char ms_reserved1b:3, // 01 reserved
ms_dbd:1, // disable block descriptors
ms_reserved1a:1, // reserved
ms_lun:3; // logical unit number
u_char ms_pagecode:6, // 02 page code (see Table 7-26)
ms_pagecontrol:2; // page control field (see Table 7-25)
#endif
u_char ms_reserved3; // 03 reserved
u_char ms_allocationlength; // 04 allocation length
u_char ms_control; // 05 control byte
};
struct cdb6_mode_select
{
u_char msl_opcode; // 00 mode select opcode
#ifdef __BIG_ENDIAN__
u_char msl_lun:3, // 01 logical unit number
msl_pf:1, // page format bit (1 = conforms to SCSI 2 spec)
msl_reserved1:3, // reserved
msl_sp:1; // save page bit
#else
u_char msl_sp:1, // save page bit
msl_reserved1:3, // reserved
msl_pf:1, // page format bit (1 = conforms to SCSI2 spec)
msl_lun:3; // logical unit number
#endif
u_char msl_reserved2; // 02 reserved
u_char msl_reserved3; // 03 reserved
u_char msl_pll; // 04 parameter list length
u_char msl_control; // 05 control byte
};
struct cdb6_send_diagnostic // Table 7-42
{
u_char sd_opcode; // 00 send diagnostic opcode
#ifdef __BIG_ENDIAN__
u_char sd_lun:3, // 01 logical unit number
sd_pf:1, // page format bit
sd_reserved1:1, // reserved
sd_selftest:1, // self test bit
sd_devofl:1, // device off line bit
sd_unitofl:1; // unit off line bit
#else
u_char sd_unitofl:1, // 01 unit off line bit
sd_devofl:1, // device off line bit
sd_selftest:1, // self test bit
sd_reserved1:1, // reserved
sd_pf:1, // page format bit
sd_lun:3; // logical unit number
#endif
u_char sd_reserved2; // 02 reserved byte
u_char sd_pll_BE16[2]; // 03-04 parameter list length (16 bit word on an odd boundary!)
u_char sd_control; // 05 control byte
};
struct cdb6_format_unit // Table 8-2 cdb for format unit command
{
u_char fu_opcode; // 00 format unit opcode
#ifdef __BIG_ENDIAN__
u_char fu_lun:3, // 01 logical unit number
fu_fmtdata:1, // format data bit
fu_cmplist:1, // complete list bit
fu_dlf:3; // defect list format
#else
u_char fu_dlf:3, // 01 defect list format
fu_cmplist:1, // complete list bit
fu_fmtdata:1, // format data bit
fu_lun:3; // logical unit number
#endif
u_char fu_reserved2; // 02 vendor specific
u_char fu_interleave_BE16[2]; // 03-04 interleave value (0 = use drive default)
u_char fu_control; // 05 control
};
struct defect_list_header // Table 8-3
{
u_char dlh_reserved0; // 00 reserved
#ifdef __BIG_ENDIAN__
u_char dlh_fov:1, // 01 format options valid bit
dlh_dpry:1, // disable primary bit
dlh_dcrt:1, // disable certification bit
dlh_stpf:1, // stop format bit
dlh_ip:1, // initialization pattern bit
dlh_dsp:1, // disable saving parameters
dlh_immed:1, // immediate bit
dlh_vs:1; // ???
#else
u_char dlh_vs:1, // 01 ???
dlh_immed:1, // immediate bit
dlh_dsp:1, // disable saving parameters
dlh_ip:1, // initialization pattern bit
dlh_stpf:1, // stop format bit
dlh_dcrt:1, // disable certification bit
dlh_dpry:1, // disable primary bit
dlh_fov:1; // format options valid bit
#endif
u_char dlh_dll_BE16[2]; // 02-03 defect list length
};
struct cdb6_start_stop // cdb for start stop command
{
u_char ss_opcode; // 00 start stop opcode
#ifdef __BIG_ENDIAN__
u_char ss_lun:3, // 01 logical unit number
ss_reserved1:4, // reserved
ss_imm:1; // immediate bit
u_char ss_reserved2; // 02 reserved
u_char ss_reserved3; // 03 reserved
u_char ss_reserved4:6, // 04 reserved
ss_loej:1, // load/eject bit
ss_start:1; // start bit
#else
u_char ss_imm:1, // 01 immediate bit
ss_reserved1:4, // reserved
ss_lun:3; // logical unit number
u_char ss_reserved2; // 02 reserved
u_char ss_reserved3; // 03 reserved
u_char ss_start:1, // 04 start bit
ss_loej:1, // load eject
ss_reserved4:6; // reserved
#endif
u_char ss_control; // 05 control
};
struct cdb10_play_audio_msf // Table 13-8 cdb for play audio command
{
u_char pam_opcode; // 00 play audio msf opcode
#ifdef __BIG_ENDIAN__
u_char pam_lun:3, // 01 logical unit number
pam_reserved1:5; // reserved
#else
u_char pam_reserved1:5, // 01 reserved
pam_lun:3; // logical unit number
#endif
u_char pam_reserved2; // 02 reserved
u_char pam_start_m; // 03 starting minute
u_char pam_start_s; // 04 starting second
u_char pam_start_f; // 05 starting frame
u_char pam_end_m; // 06 ending minute
u_char pam_end_s; // 07 ending second
u_char pam_end_f; // 08 ending frame
u_char pam_control; // 09 control
};
struct cdb10_read_toc // Table 13-6 cdb for read toc command
{
u_char rtoc_opcode; // 00 read table of contents opcode
#ifdef __BIG_ENDIAN__
u_char rtoc_lun:3, // 01 logical unit number
rtoc_reserved1a:3, // reserved
rtoc_msf:1, // 1 = use msf format, 0 = use abs addr format
rtoc_reserved1b:1; // reserved
#else
u_char rtoc_reserved1b:1, // 01 reserved
rtoc_msf:1, // 1 = use msf format, 0 = use abs addr format
rtoc_reserved1a:3, // reserved
rtoc_lun:3; // logical unit number
#endif
u_char rtoc_reserved2; // 02 reserved
u_char rtoc_reserved3; // 03 reserved
u_char rtoc_reserved4; // 04 reserved
u_char rtoc_reserved5; // 05 reserved
u_char rtoc_starttrack; // 06 starting track
u_char rtoc_length_BE16[2]; // 07-08 length of structure allocated to hold toc entries
u_char rtoc_control; // 09 control byte
};
typedef union cdb
{
struct cdb6 cdb6;
struct cdb6_format_unit cdb6_format_unit;
struct cdb6_mode_select cdb6_mode_select;
struct cdb6_mode_sense cdb6_mode_sense;
struct cdb6_send_diagnostic cdb6_send_diagnostic;
struct cdb6_start_stop cdb6_start_stop;
struct cdb10 cdb10;
struct cdb10_play_audio_msf cdb10_play_audio_msf;
struct cdb10_read_toc cdb10_read_toc;
struct cdb12 cdb12;
} cdb;
typedef struct scsi_req // SCSI Request used by sg driver via SGIOCREQ and internally in st driver
{
// inputs
cdb sr_cdb; // command descriptor block one of three formats
sc_dma_dir sr_dma_dir; // DMA direction
caddr_t sr_addr; // memory addr for data transfers
int sr_dma_max; // maximum number of bytes to transfer
int sr_ioto; // I/O timeout in seconds
// returned status information
int sr_io_status; // driver status
u_char sr_scsi_status; // SCSI status byte
esense_reply sr_esense; // extended sense in case of check status
int sr_dma_xfr; // actual number of bytes transferred by DMA
struct timeval sr_exec_time; // execution time in microseconds
u_char sr_flags; // flags
queue_chain_t sr_io_q; // for linking onto sgdp-> sdg_io_q
} scsi_req;
struct scsi_adr
{
u_char sa_target; // 00 target ID
u_char sa_lun; // 01 target lun
};
//
// Mode sense/select data structures
//
typedef struct page_header // Table 7-64
{
#ifdef __BIG_ENDIAN__
u_char ph_ps:1, // 00 parameters savable bit
ph_reserved1:1, // reserved
ph_pagecode:6; // page code
#else
u_char ph_pagecode:6, // 00 page code
ph_reserved1:1, // reserved
ph_ps:1; // parameters savable bit
#endif
u_char ph_pagelength; // 01 page length in bytes
} ph;
struct caching_page // Table 8-48
{
ph cp_ph; // 00-01 page header
#ifdef __BIG_ENDIAN__
u_char cp_reserved2:5, // 02 reserved
cp_wce:1, // write cache enabled
cp_mf:1, // interpret min/max prefetch as multiplication factor
cp_rcd:1; // read cache disabled
u_char cp_drrp:4, // 03 demand read retention priority (see Table 8-49)
cp_wrp:4; // write retention priority (see Table 8-49)
#else
u_char cp_rcd:1, // 02 read cache disabled
cp_mf:1, // interpret min/max prefetch as multiplication factor
cp_wce:1, // write cache enabled
cp_reserved2:5; // reserved
u_char cp_wrp:4, // 03 write retention priority (see Table 8-49)
cp_drrp:4; // demand read retention priority (see table 8-49)
#endif
u_char cp_dptl_BE16[2]; // 04-05 disable pre-fetch transfer length
u_char cp_minprefetch_BE16[2]; // 06-07 minimum pre-fetch (interpretation depends on mf bit)
u_char cp_maxprefetch_BE16[2]; // 08-09 maximum pre-fetch (interpretation depends on mf bit)
u_char cp_maxprefetchceiling_BE16[2]; // 10-11 maximum pre-fetch ceiling (in sectors)
};
struct cdrom_audio_control_page // Table 13-35
{
ph cacp_ph; // 00-01 page header
#ifdef __BIG_ENDIAN__
u_char cacp_reserved2:5, // 02 reserved
cacp_immed:1, // immediate mode
cacp_sotc:1, // stop on track crossing
cacp_reserved2a:1; // reserved
u_char cacp_reserved3; // 03 reserved
u_char cacp_reserved4; // 04 reserved
u_char cacp_aprval:1, // 05 audio playback rate valid
cacp_reserved5:3, // reserved
cacp_format:4; // format of lbas/second
u_short cacp_lbsplayback_BE16; // 06-07 logical blocks/second of audio playback
u_char cacp_reserved8:4, // 08 reserved
cacp_output0selection:4; // audio output port 0 channel selection (Table 13-35)
u_char cacp_output0volume; // 09 audio output port 0 volume selection
u_char cacp_reserved10:4, // 10 reserved
cacp_output1selection:4; // audio output port 1 channel selection (Table 13-35)
u_char cacp_output1volume; // 11 audio output port 1 volume selection
u_char cacp_reserved12:4, // 12 reserved
cacp_output2selection:4; // audio output port 2 channel selection (Table 13-35)
u_char cacp_output2volume; // 13 audio output port 2 volume selection
u_char cacp_reserved14:4, // 14 reserved
cacp_output3selection:4; // audio output port 3 channel selection (Table 13-35)
u_char cacp_output3volume; // 15 audio output port 3 volume selection
#else
u_char cacp_reserved2a:1, // 02 reserved
cacp_sotc:1, // stop on track crossing
cacp_immed:1, // immediate mode
cacp_reserved2:5; // reserved
u_char cacp_reserved3; // 03 reserved
u_char cacp_reserved4; // 04 reserved
u_char cacp_format:4, // 05 format of lbas/second
cacp_reserved5:3, // reserved
cacp_aprval:1; // audio playback rate valid
u_short cacp_lbsplayback_BE16; // 06-07 logical blocks/second of audio playback
u_char cacp_output0selection:4, // 08 audio output port 0 channel selection (Table 13-35)
cacp_reserved8:4; // reserved
u_char cacp_output0volume; // 09 audio output port 0 volume selection
u_char cacp_output1selection:4, // 10 audio output port 1 channel selection (Table 13-35)
cacp_reserved10:4; // reserved
u_char cacp_output1volume; // 11 audio output port 1 volume selection
u_char cacp_output2selection:4, // 12 audio output port 2 channel selection (Table 13-35)
cacp_reserved12:4; // reserved
u_char cacp_output2volume; // 13 audio output port 2 volume selection
u_char cacp_output3selection:4, // 14 audio output port 3 channel selection (Table 13-35)
cacp_reserved14:4; // reserved
u_char cacp_output3volume; // 15 audio output port 3 volume selection
#endif
};
struct cdrom_parameters_page // Table 13-36
{
ph cpp_ph; // 00-01 page header
u_char cpp_reserved2; // 02 reserved
#ifdef __BIG_ENDIAN__
u_char cpp_reserved3:4, // 03 reserved
cpp_inactivitytimer:4; // inactivity timer multiplier
#else
u_char cpp_inactivityTimerMult:4, // 03 inactivity timer multiplier
cpp_reserved3:4; // reserved
#endif
u_short cpp_spermunits_BE16; // 04-05 number of MSF S units per MSF M unit
u_short cpp_fpersunits_BE16; // 06-07 number of MSF F units per MSF S unit
};
struct control_mode_page // Table 7-66
{
ph cmp_ph; // 00-01 page header
#ifdef __BIG_ENDIAN__
u_char cmp_reserved2:7, // 02 reserved
cmp_rlec:1; // report log exception condition bit
u_char cmp_qam:4, // 03 queue algorithm modifier
cmp_reserved3:2, // reserved
cmp_qerr:1, // queue error management
cmp_dqeue:1; // disable queuing
u_char cmp_eeca:1, // 04 enable extended contingent allegiance
cmp_reserved4:4, // reserved
cmp_raenp:1, // ready AEN permission
cmp_uaaenp:1, // unit attention AEN permission
cmp_eaenp:1; // error AEN permission
#else
u_char cmp_rlec:1, // 02 report log exception condition
cmp_reserved2:7; // reserved
u_char cmp_dque:1, // 03 disable queuing
cmp_qerr:1, // queue error management
cmp_reserved3:2, // reserved
cmp_qam:4; // 04 queue algorithm modifier
u_char cmp_eaenp:1, // errror AEN permission
cmp_uaaenp:1, // unit attention aen permission
cmp_raenp:1, // ready AEN permission
cmp_reserved4:4, // reserved
cmp_eeca:1; // enable extended contingent allegiance
#endif
u_char cmp_reserved5; // 05 reserved
u_short cmp_raenhop_BE16; // 06-07 ready AEN hold-off period (milliseconds)
};
struct device_configuration_page // Table 9-24
{
ph dcp_ph; // 00-01 page header
#ifdef __BIG_ENDIAN__
u_char dcp_reserved2:1, // 02 reserved
dcp_cap:1, // change active partition to that specified in activePartition
dcp_caf:1, // change active format to that specifed in activeFormat
dcp_activeformat:5; // specifies active recording format (vendor specific)
#else
u_char dcp_activeformat:5, // 02 specifies active recording format (vendor specific)
dcp_caf:1, // change active format to that specified in activeFormat
dcp_cap:1, // change active partition to that specified in activePartition
dcp_reserved2:1; // reserved
#endif
u_char dcp_activepartition; // 03 current logical partition number in use on medium
u_char dcp_wbfr; // 04 indicates how full buffer should be before writing to medium
u_char dcp_rber; // 05 indicates how empty buffer should be before reading from medium
u_short dcp_writedelay_BE16; // 06-07 maximum write delay time in 100 millisecond increments
#ifdef __BIG_ENDIAN__
u_char dcp_dbr:1, // 08 data buffer recovery
dcp_bis:1, // block identifiers supported
dcp_rsmk:1, // report set marks
dcp_avc:1, // automatic velocity control
dcp_socf:2, // stop on consecutive filemarks
dcp_rbo:1, // recover buffer order
dcp_rew:1; // report early warning
u_char dcp_gapsize; // 09 inter-block gap size
u_char dcp_eod:3, // 10 end of data defined
dcp_eeg:1, // enable eod generation
dcp_sew:1, // synchronize early warning
dcp_reserved10:3; // reserved
#else
u_char dcp_rew:1, // 08 report early warning
dcp_rbo:1, // recover buffer order
dcp_socf:2, // stop on consecutive filemarks
dcp_avc:1, // automatic velocity control
dcp_rsmk:1, // report set marks
dcp_bis:1, // block identifiers supported
dcp_dbr:1; // data buffer recovery
u_char dcp_gapsize; // 09 inter-block gap size
u_char dcp_reserved10:3, // 10 reserved
dcp_sew:1, // synchronize early warning
dcp_eeg:1, // enable eod generation
dcp_eod:3; // end of data defined
#endif
u_char dcp_earlywarning_BE24[3]; // 11-13 buffer size in bytes while writing after early-warning
u_char dcp_sdca; // 14 vendor specific compression algorithm specifier
u_char dcp_reserved15; // 15 reserved
};
struct disconnect_reconnect_page // Table 7-68
{
ph drp_ph; // 00-01 page header
u_char drp_bufferfullratio, // 02 buffer full ratio
drp_bufferemptyratio; // 03 buffer empty ratio
u_short drp_businactivitylimit_BE16, // 04-05 bus inactivity limit (100 ms increments)
drp_disconnecttimelimit_BE16, // 06-07 disconnect time limit (100 ms increments)
drp_connecttimelimit_BE16, // 08-09 connect time limit (100 ms increments)
drp_maximumburstsize_BE16; // 10-11 maximum burst size (512 byte increments)
#ifdef __BIG_ENDIAN__
u_char drp_reserved12:6, // 12 reserved
drp_dtdc:2; // data transfer disconnect control (Table 7-69)
#else
u_char drp_dtdc:2, // 12 data transfer disconnect control (Table 7-69)
drp_reserved12:6; // reserved
#endif
u_char drp_reserved13, // 13 reserved
drp_reserved14, // 14 reserved
drp_reserved15; // 15 reserved
};
struct flexible_disk_page // Table 8-49 and 8-50
{
ph fdp_ph; // 00-01 page header
u_short fdp_transferrate_BE16; // 02-03 data rate in kilobits/second
u_char fdp_numheads, // 04 number of read/write heads
fdp_sectorspertrack; // 05 number of sectors per revolution per head
u_short fdp_databytespersector_BE16, // 06-07 number of bytes of data in a sector
fdp_numcylinders_BE16, // 08-09 number of cylinders used for data storage
fdp_scwp_BE16, // 10-11 starting cylinder for write precompensation
fdp_scrwc_BE16, // 12-13 starting cylinder for reduced write current
fdp_drivesteprate_BE16; // 14-15 step rate in units of 100 microseconds
u_char fdp_drivesteppulsewidth; // 16 width of the step pulse in microseconds (0 = default)
u_short fdp_headsettledelay_BE16; // 17-18 head settle time in units of 100 microseconds (0 = default)
u_char fdp_motorondelay, // 19 motor on delay in units of 1/10ths of a second
fdp_motoroffdelay; // 20 motor off delau in units of 1/10ths of a second
#ifdef __BIG_ENDIAN__
u_char fdp_trdy:1, // 21 true ready signal provided
fdp_ssn:1, // sector start number (0 or 1)
fdp_mo:1, // motor on (pin 16) handling
fdp_reserved21:5; // reserved
u_char fdp_reserved22:4, // 22 reserved
fdp_spc:4; // additional head step pulses required per cylinder
u_char fdp_wpv, // 23 amount of write pre-compenstion (vendor specific)
fdp_headloaddelay, // 24 head loading time in milliseconds (0 = default)
fdp_headunloaddelay; // 25 head unloading time in milliseconds (0 = default)
u_char fdp_pin34:4, // 26 defines usage of pin 34
fdp_pin2:4; // defines usage of pin 2
u_char fdp_pin4:4, // 27 defines usage of pin 4
fdp_pin1:4; // defines usage of pin 1
#else
u_char fdp_reserved21:5, // 21 reserved
fdp_mo:1, // motor on (pin 16) handling
fdp_ssn:1, // sector start number (0 or 1)
fdp_trdy:1; // true ready signal provided
u_char fdp_spc:4, // 22 additional head step pulses required per cylinder
fdp_reserved22:4; // reserved
u_char fdp_wpv, // 23 amount of write pre-compensation (vendor specific)
fdp_headloaddelay, // 24 head loading time in milliseconds (0 = default)
fdp_headunloaddelay; // 25 head unloading time in milliseconds (0 = default)
u_char fdp_pin2:4, // 26 defines usage of pin 2
fdp_pin34:4; // defines usage of pin 34
u_char fdp_pin1:4, // 27 defines usage of pin 4
fdp_pin4:4; // defines usage of pin 1
#endif
u_char fdp_mediumrotationrate_BE16[2]; // 28-29 medium rotation rate in rotations per minute
u_char fdp_reserved30, // 30 reserved
fdp_reserved31; // 31 reserved
};
struct format_device_page // Table 8-52
{
ph fodp_ph; // 00-01 page header
u_char fodp_tracksperzone_BE16[2], // 02-03 tracks per zone
fodp_altsectorsperzone_BE16[2], // 04-05 alternate sectors per zone
fodp_alttracksperzone_BE16[2], // 06-07 alternate tracks per zone
fodp_alttracksperunit_BE16[2], // 08-09 alternate tracks per logical unit
fodp_sectorspertrack_BE16[2], // 10-11 sectors per track
fodp_databytespersector_BE16[2],// 12-13 data bytes per physical sector
fodp_interleave_BE16[2], // 14-15 interleave
fodp_trackskewfactor_BE16[2], // 16-17 track skew factor
fodp_cylinderskewfactor_BE16[2];// 18-19 cylinder skew factor
#ifdef __BIG_ENDIAN__
u_char fodp_ssec: 1, // 20 soft sector formatting
fodp_hsec: 1, // hard sector formatting
fodp_rmb: 1, // removable media
fodp_surf: 1, // sequential blocks by surface (1) or cylinder (0)
fodp_reserved20: 4; // reserved
#else
u_char fodp_reserved20: 4, // 20 reserved
fodp_surf: 1, // sequential blocks by surface (1) or cylinder (0)
fodp_rmb: 1, // removable media
fodp_hsec: 1, // hard sector formatting
fodp_ssec: 1; // soft sector formatting
#endif
u_char fodp_reserved21; // 21 reserved
u_char fodp_reserved22; // 22 reserved
u_char fodp_reserved23; // 23 reserved
};
struct medium_types_page // Table 8-53
{
ph mtp_ph; // 00-01 page header
u_char mtp_reserved2, // 02 reserved
mtp_reserved3; // 03 reserved
u_char mtp_mediumtype[4]; // 04-07 media types supported by target
};
struct notch_page // Table 8-54
{
ph np_ph; // 00-01 page header
#ifdef __BIG_ENDIAN__
u_char np_nd: 1, // 02 notched drive
np_lpn: 1, // logical or physical notch
np_reserved2: 6; // reserved
#else
u_char np_reserved2: 6, // 02 reserved
np_lpn: 1, // logical or physical notch
np_nd: 1; // notched drive
#endif
u_char np_reserved3; // 03 reserved
u_short np_maxnotches_BE16, // 04-05 maximum number of notches supported
np_activenotch_BE16; // 06-07 currently active notch
u_long np_startingboundary_BE32, // 08-11 beginning of current notch
np_endingboundary_BE32; // 12-15 end of current notch
u_char np_pagesnotched[8]; // 16-23 bit-map of notch variable mode page codes
};
struct peripheral_page // Table 7-70
{
ph pp_ph; // 00 - 01 page header
u_short pp_interfaceindentifier_BE16; // 02 - 03 interface identifier (Table 7-71)
u_char pp_reserved4, // 04 reserved
pp_reserved5, // 05 reserved
pp_reserved6, // 06 reserved
pp_reserved7; // 07 reserved
u_char pp_vendorspecific; // 08 - ?? start of vendor specific area
};
struct read_write_error_recovery_page // Table 8-55
{
ph rwerp_ph; // 00-01 page header
#ifdef __BIG_ENDIAN__
u_char rwerp_awre:1, // 02 automatic write reallocation enabled
rwerp_arre:1, // automatic read reallocation enabled
rwerp_tb:1, // transfer block
rwerp_rc:1, // read continuous
rwerp_eer:1, // enable early recovery (see Table 8-56)
rwerp_per:1, // post error (see Table 8-56)
rwerp_dte:1, // disable transfer on error (see Table 8-56)
rwerp_dcr:1; // disable correction (see Table 8-56)
#else
u_char rwerp_dcr:1, // 02 disable correction (see Table 8-56)
rwerp_dte:1, // disable transfer on error (see Table 8-56)
rwerp_per:1, // post error (see Table 8-56)
rwerp_eer:1, // enable early recovery (see Table 8-56)
rwerp_rc:1, // read continuous flag
rwerp_tb:1, // transfer block
rwerp_arre:1, // automatic read reallocation enabled
rwerp_awre:1; // automatic write reallocation enabled
#endif
u_char rwerp_readretrycount, // 03 read retry count
rwerp_correctionspan, // 04 size in bits of largest error to attempt correction for
rwerp_headoffsetcount, // 05 head offset in two's complement
rwerp_datastrobeoffsetcount, // 06 data strobe offset in two's complement
rwerp_reserved7, // 07 reserved
rwerp_writeretrycount, // 08 write retry count
rwerp_reserved9; // 09 reserved
u_char rwerp_rtl_BE16[2]; // 10-11 recovery time limit
};
struct rigid_disk_page // Table 8-61
{
ph rdp_ph; // 00-01 page header
u_char rdp_numcyls_BE24[3]; // 02-04 number of physical cylinders used for data storage.
u_char rdp_numheads; // 05 number of physical heads used for data storage
u_char rdp_scwp_BE24[3]; // 06-08 start cylinder for write pre-compensaction
u_char rdp_scrwc_BE24[3]; // 09-11 start cylinder for reduced write current
u_short rdp_drivesteprate_BE16; // 12-13 step rate in 100 nanosecond intervals
u_char rdp_landingzonecy_BE24[3]; // 14-16 two's complement location for head positioning
#ifdef __BIG_ENDIAN__
u_char rdp_reserved17:6, // 17 reserved
rdp_rpl:2; // rotational position locking (see Table 8-62)
#else
u_char rdp_rpl:2, // 17 rotational position locking (see Table 8-62)
rdp_reserved17:6; // reserved
#endif
u_char rdp_rotoffset; // 18 amount of rotational skew to use when synchronized
u_char rdp_reserved19; // 19 reserved
u_char rdp_rotrate_BE16[2]; // 20-21 medium rotation rate in rotations per minute
u_char rdp_reserved22, // 22 reserved
rdp_reserved23; // 23 reserved
};
struct verify_error_recovery_page // Table 8-63
{
ph verp_ph; // 00-01 page header
#ifdef __BIG_ENDIAN__
u_char verp_reserved2:4, // 02 reserved
verp_eer:1, // enable early recovery (see Table 8-56)
verp_per:1, // post error (see Table 8-56)
verp_dte:1, // disable transfer on error (see Table 8-56)
verp_dcr:1; // disable correction (see Table 8-56)
#else
u_char verp_dcr:1, // 02 disable correction (see Table 8-56)
verp_dte:1, // disable transfer on errror (see Table 8-56)
verp_per:1, // post error (see Table 8-56)
verp_eer:1, // enable early recovery (see Table 8-56)
verp_reserved2:4; // reserved
#endif
u_char verp_retrycount, // 03 verify retry count
verp_correctionspan, // 04 size in bits of largest error to attempt recovery for
verp_reserved5, // 05 reserved
verp_reserved6, // 06 reserved
verp_reserved7, // 07 reserved
verp_reserved8, // 08 reserved
verp_reserved9; // 09 reserved
u_char verp_rtl_BE16[2]; // 10 verify recovery time limit in milliseconds
};
typedef union mode_page
{
ph ph;
struct caching_page cp;
struct cdrom_audio_control_page cacp;
struct cdrom_parameters_page cpp;
struct control_mode_page cmp;
struct device_configuration_page dcp;
struct disconnect_reconnect_page drp;
struct flexible_disk_page fdp;
struct format_device_page fodp;
struct medium_types_page mtp;
struct notch_page np;
struct peripheral_page pp;
struct rigid_disk_page rdp;
struct read_write_error_recovery_page rwerp;
struct verify_error_recovery_page verp;
} mode_page;
typedef struct block_descriptor
{
u_char bd_densitycode; // 00 unique for each device type
u_char bd_numberofblocks_BE24[3]; // 01-03 number of blocks (24 bits! bytes 2, 1, 0)
u_char bd_reserved4; // 04 reserved
u_char bd_blocklength_BE24[3]; // 05-07 block length (24 bits! bytes 2, 1, 0)
} bd;
typedef union device_specific_parameters
{
#ifdef __BIG_ENDIAN__
// direct access devices
u_char dsp_swp:1, // 00 write protect flag
dsp_sbufferedmode:3, // buffer mode
dsp_sspeed:4; // speed
// sequential access devices
u_char dsp_dwp:1, // 00 write protect flag
dsp_dreserved2a:2, // reserved
dsp_dcache: 1, // cache enabled flag
dsp_dreserved2b:4; // reserved
#else
u_char dsp_sspeed:4, // 00 speed
dsp_sbufferedmode:3, // buffer mode
dsp_swp:1; // write protect flag
// direct access devices
u_char dsp_dreserved2b: 4, // 00 reserved
dsp_dcache: 1, // cache enabled flag
dsp_dreserved2a: 2, // reserved
dsp_dwp: 1; // write protect flag
// sequential access devices
#endif
} dsp;
typedef struct mode_parameter_list // Table 7-61
{
u_char mpl_datalength; // 00 length in bytes of mode sense data
u_char mpl_mediumtype; // 01 media type (device type specific)
dsp mpl_dsp; // 02 device specific parameters
u_char mpl_bdlength; // 03 length in bytes of all block descriptors
bd mpl_bd[1]; // 04- zero, one, or more block descriptors MIGHT be here!
// followed by zero, one or more pages of sense data!
} mode_parameter_list;
//
// CD ROM reply structures
//
struct msf
{
u_char msf_reserved;
u_char msf_minute;
u_char msf_second;
u_char msf_frame;
};
typedef union cd_address
{
u_int addr_abs_BE32;
struct msf addr_msf;
} cd_address;
typedef struct track_descriptor // Table 13-27 track descriptor
{
u_char td_reserved0; // 00 reserved
#ifdef __BIG_ENDIAN__
u_char td_adr:4, // 01 type of information encoded in Q sub-channel (Table 13-21)
td_control:4; // control attributes of track (Table 13-22)
#else
u_char td_control:4, // 01 control attributes of track (Table 13-22)
td_adr:4; // type of information encoded in Q sub-channel (Table 13-21)
#endif
u_char td_track; // 02 track number
u_char td_reserved3; // 03 reserved
cd_address td_address; // 03-07 address in either msf or absolute form depending on msf bit
} td;
struct toc // Table 13-27 CD table of contents
{
u_short toc_datalength_BE16; // 00 - 01 length of valid data contained in this structure
u_char toc_firsttrack; // 02 first track number
u_char toc_lasttrack; // 03 last track number
td toc_track[100]; // 04 - track descriptors for each track in the range given above
};
struct subqchannel_page
{
#ifdef __BIG_ENDIAN__
u_char sc_adr:4, /* Q mode info */
sc_control:4; /* sub-c Q control bits */
#else
u_char sc_control:4,
sc_adr:4;
#endif
u_char sc_track; /* track # */
u_char sc_index; /* index # */
u_int BE_sc_absoluteaddress; /* CD-ROM absolute address */
u_int BE_sc_trackrelative; /* CD-ROM track relative address */
#ifdef __BIG_ENDIAN
u_char sc_mcval: 1, /* media catalogue valid */
sc_reserved16:7;
#else
u_char sc_reserved16:7,
sc_mcval:1;
#endif
char sc_mediacatalog[15]; /* media catalogue # (UPC/Barcode) */
#ifdef __BIG_ENDIAN__
u_char sc_tcval:1, /* track code valid */
sc_reserved32:7;
#else
u_char sc_reserved32:7,
sc_tcval:1;
#endif
char sc_trackisrc[15]; /* track international standard recording code */
};
struct cdromposition_page
{
#ifdef __BIG_ENDIAN__
u_char sc_adr:4, /* Q mode info */
sc_control:4; /* sub-c Q control bits */
#else
u_char sc_control:4,
sc_adr:4;
#endif
u_char sc_track; /* track # */
u_char sc_index; /* index # */
u_int BE_sc_absoluteaddress; /* CD-ROM absolute address */
u_int BE_sc_trackrelative; /* CD-ROM track relative address */
};
struct mediacatalog_page
{
u_char sc_reserved5;
u_char sc_reserved6;
u_char sc_reserved7;
#ifdef __BIG_ENDIAN__
u_char sc_mcval: 1, /* media catalogue valid */
sc_reserved8:7;
#else
u_char sc_reserved8:7,
sc_mcval: 1;
#endif
char sc_mediacatalog[15]; /* media catalogue # (UPC/Barcode) */
};
struct trackisrc_page
{
u_char sc_track;
u_char sc_reserved6;
u_char sc_reserved7;
#ifdef __BIG_ENDIAN__
u_char sc_tcval: 1, /* media catalogue valid */
sc_reserved8:7;
#else
u_char sc_reserved8:7,
sc_tcval: 1;
#endif
char sc_trackisrc[15]; /* track international standard recording code */
};
struct vendorunique_page
{
u_short BE_sc_rawdata[30];
};
union subcpages
{
struct subqchannel_page subq;
struct cdromposition_page position;
struct mediacatalog_page mediacatalog;
struct trackisrc_page trackisrc;
struct vendorunique_page vendorunique;
};
struct subchannelReply
{
u_char sc_reserved0; /* Reserved */
u_char sc_audiostatus;
u_short BE_sc_datalength; /* Sub-channel data length */
u_char sc_dataformat; /* data format code */
union subcpages data;
};
#endif _BSD_DEV_SCSIREG_
These are the contents of the former NiCE NeXT User Group NeXTSTEP/OpenStep software archive, currently hosted by Netfuture.ch.